The following table lists the CG clock manager errors (0x0D80, 0x0D90, 0xDC0):
|
Error name |
Hex |
Description |
Category |
|---|---|---|---|
|
CLK_MGR_ERR_INVALID_PARAMETER |
0x0D80 |
Parameters passed to the function do not match the requirements. |
3 |
|
CLK_MGR_ERR_ILLEGAL_CLK_INDEX |
0x0D81 |
Framer INDEX outside the range of valid framers. |
3 |
|
CLK_MGR_ERR_PREV_CLK_DEFINED |
0x0D82 |
A framer instance already exists at this index. |
3 |
|
CLK_MGR_ERR_UNRECOG_CLK_TYPE |
0x0D83 |
Attempted to create an invalid framer type. Framer type must be T1 or E1. |
3 |
|
CLK_MGR_ERR_NO_CONFIG_BUF |
0x0D84 |
No configuration buffer to send to init code. |
3 |
|
CLK_MGR_ERR_NOT_INITIALIZED |
0x0D85 |
Default error results are set to this. |
3 |
|
CLK_MGR_ERR_NO_BUF |
0x0D86 |
Command expected a buffer and none is present. |
3 |
|
CLK_MGR_ERR_UNABLE_TO_ENABLE_IRQ |
0x0D87 |
Could not hook into an IRQ chain. |
3 |
|
CLK_MGR_ERR_UNABLE_TO_START_1SEC_THREAD |
0x0D88 |
Unable to start a thread for a 1 second process. |
3 |
|
CLK_MGR_ERR_UNABLE_TO_START_IRQ_THREAD |
0x0D89 |
Unable to start a thread for a 1 second process. |
3 |
|
CLK_MGR_ERR_UNABLE_TO_CREATE_1SEC_LIST |
0x0D8A |
Unable to create a new function list for a 1 second process. |
3 |
|
CLK_MGR_ERR_UNABLE_TO_CREATE_IRQ_LIST |
0x0D8B |
Unable to create a new function list for an IRQ process. |
3 |
|
CLK_MGR_ERR_UNABLE_TO_CREATE_EVENT_HDL |
0x0D8C |
Unable to create an event handle for an IRQ DPC code. |
3 |
|
CLK_MGR_ERR_UNABLE_TO_CREATE_DPC_LIST |
0x0D8D |
Unable to create a list to handle DPCs. |
3 |
|
CLK_MGR_ERR_UNABLE_TO_CREATE_BDCLKCFG |
0x0D8E |
Unable to create or get a handle for BD_CLK_CFG. |
3 |
|
CLK_MGR_ERR_UNABLE_TO_CREATE_CLOCKSM |
0x0D8F |
Unable to create or get a handle for CLOCKSM. |
3 |
|
CLK_MGR_ERR_UNABLE_TO_CREATE_CRIT_SECT |
0x0D90 |
Unable to create a critical section for CLOCKSM. |
3 |
|
CLK_MGR_ERR_UNABLE_TO_GET_CRIT_SECT |
0x0D91 |
Timed out getting the CLOCKSM critical section. |
3 |
|
CLK_MGR_ERR_ILLEGAL_CLK_SRC_SELECTION |
0x0D92 |
In Slave mode, the only fallback source allowed is the other CT bus clock. |
1 |
|
CLK_MGR_ERR_CONNECTIONS_TO_HBUS_PRESENT |
0x0D93 |
To switch to standalone, no connections to the H.100 bus can be present. |
1 |
|
BDCFG_ERR_NO_HMIC_FOUND |
0x0DC0 |
No HMIC found. |
2 |
|
BDCFG_ERR_UNRECOG_PARAMETER |
0x0DC1 |
Invalid clocking parameter. |
3 |
|
BDCFG_ERR_BAD_CTBUS_CLOCK_SRC |
0x0DC2 |
Clock source to be used was in alarm. |
5 |
|
BDCFG_ERR_ONLY_SUPPORT_8KHZ |
0x0DC3 |
NETREF signals on this board support only an 8 kHz operation. |
4 |
|
BDCFG_ERR_NO_NETWORK_INSTANCE |
0x0DC4 |
Clock source to be used does not exist or is not configured. |
5 |
|
BDCFG_ERR_CLOCK_SOURCE_IN_ALARM |
0x0DC5 |
Clock source to be used was in alarm. |
5 |
|
BDCFG_ERR_NO_MVIP_CLK_SUPPORT |
0x0DC6 |
No MVIP bus support. |
4 |
|
BDCFG_ERR_SM_CLOCK_CFG_FAILS |
0x0DC7 |
Failed when the clock fallback state machine issued command. |
3 |
|
BDCFG_ERR_NO_NETREF_ON_WDOG |
0x0DC8 |
Failed to detect the NETREF signal on I/O after configured to drive the signal. |
5 |
|
BDCFG_ERR_CANNOT_GET_CLK_REG_HNDL |
0x0DC9 |
Failed to get the handle to write HMIC registers. |
3 |
|
CLKSM_ERR_STANDALONE_NO_SRC |
0x0DCA |
Both clock sources failed while running in standalone mode. |
5 |
|
CLKSM_ERR_PRIMARY_NO_SRC |
0x0DCB |
Both clock sources failed while running in primary mode. |
5 |
|
CLKSM_ERR_SECONDARY_NO_SRC |
0x0DCC |
Both clock sources failed while running in secondary mode. |
5 |
|
CLKSM_ERR_SLAVE_NO_SRC |
0x0DCD |
Both clock sources failed while running in slave mode. |
5 |
|
BDCFG_ERR_LREF_PREVIOUS_IN_USE |
0x0DCE |
LREF previously in use - clocking restriction. |
4 |