To drive its CT bus clock, a clock master takes a reference signal, extracts the frequency information, defines a phase reference at the extracted frequency, and broadcasts this information as A_CLOCK or B_CLOCK. This reference signal is called a timing reference. When you set up a clock master, you specify what source the board uses as its timing reference.
Note: Not all boards support all timing references. For information on the board models, refer to the board documentation.
The timing reference signal originates in one of two places:
It can originate within the public network and enter the system through a digital trunk. This is called a NETWORK timing reference.
The following illustration shows a system using a timing reference from NETWORK:
In a system with no digital telephone network interfaces, an on-board oscillator can be used as the timing reference to drive the clock signals. This is called an OSC timing reference. Use OSC only if there is no external clock source available. The following illustration shows a system using a timing reference from OSC:
The timing reference used by a clock master to drive the CT bus clock originates from an oscillator or trunk connected to another device in the system. In this case, the timing reference signal is carried over the CT bus to the clock master, which derives the clock signal and drives the clock for the slaves. The following illustration shows a system using a timing reference from another device:
The channel over which the timing reference signal is carried to the clock master is called NETREF. The following illustration shows a system using a timing reference from NETREF:
On the H.110 bus, a second timing reference signal can be carried on a fourth channel, called NETREF2. NETREF is referred to as NETREF1 in this case. The following illustration shows a system using a timing reference from NETREF2:
Note: Not all board models support NETREF or NETREF2. For more information about board models, refer to the board documentation.